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5-557 fast and ls ttl data quad 2-port register the sn54 / 74ls398 and sn54 / 74ls399 are quad 2-port registers. they are the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register . a common select input selects between two 4-bit in - put ports (data sources). the selected data is transferred to the output register on the low-to-high transition of the clock input. the sn54/ 74ls398 fea- tures both q and q inputs, while the sn54/ 74ls399 has only q outputs. ? select from two data sources ? fully positive edge-triggered operation ? both true and complemented outputs on sn54/ 74ls398 ? input clamp diodes limit high-speed termination effects connection diagram dip (top view)

sn54 / 74ls398

sn54 / 74ls399 pin names loading (note a) high low s common select input 0.5 u.l. 0.25 u.l. cp clock (active high going edge) input 0.5 u.l. 0.25 u.l. i 0a i 0d data inputs from source 0 0.5 u.l. 0.25 u.l. i 1a i 0d data inputs from source 1 0.5 u.l. 0.25 u.l. q a q d register true outputs (note b) 10 u.l. 5 (2.5) u.l. q a q d register complementary outputs (note b) 10 u.l. 5 (2.5) u.l. notes: a) 1 ttl unit load (u.l.) = 40 m a high/1.6 ma low. b) the output low drive factor is 2.5 u.l. for military (54) and 5 u.l. for commercial (74) temperature ranges. sn54/74ls398 sn54/74ls399 quad 2-port register low power schottky ordering information sn54lsxxxj ceramic sn74lsxxxn plastic sn74lsxxxdw soic sn74lsxxxd soic j suffix ceramic case 620-09 n suffix plastic case 648-08 16 1 16 1 16 1 d suffix soic case 751b-03 20 1 j suffix ceramic case 732-03 20 1 n suffix plastic case 738-03 20 1 dw suffix soic case 751d-03
5-558 fast and ls ttl data sn54/74ls398 ? sn54/74ls399 functional block diagram * sn54 / 74ls398 only functional description the sn54 / 74ls398 and sn54 / 74ls399 are high-speed quad 2-port registers. they select four bits of data from two sources (ports) under the control of a common select input (s). the selected data is transferred to a 4-bit output register synchronous with the low -to-high transition of the clock in - put (cp). the 4-bit rs type output register is fully edge-trig - gered. the data inputs (i) and select inputs (s) must be stable only a setup time prior to and hold time after the low -to-high transition of the clock input for predictable operation. the sn54 / 74ls398 has both q and q outputs available. function table inputs outputs s i 0 i 1 q q * i i x l h i h x h l h x i l h h x h h l *sn54 / 74ls398 only i = low v oltage level one setup time pior to the low -to-high clock transition h = high v oltage level one setup time prior to the low -to-high clock transition l = low voltage level h = high voltage level x = immaterial
5-559 fast and ls ttl data sn54/74ls398 ? sn54/74ls399 guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 v t a operating ambient temperature range 54 74 55 0 25 25 125 70 c i oh output current e high 54, 74 0.4 ma i ol output current e low 54 74 4.0 8.0 ma dc characteristics over operating temperature range (unless otherwise specified) symbol parameter limits unit test conditions symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 54 0.7 v guaranteed input low voltage for all inputs v il input low voltage 74 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh output high voltage 54 2.5 3.5 v v cc = min, i oh = max, v in = v ih or v il per truth table v oh output high voltage 74 2.7 3.5 v v cc = min, i oh = max, v in = v ih or v il per truth table v ol output low voltage 54, 74 0.25 0.4 v i ol = 4.0 ma v cc = v cc min, v in = v il or v ih per truth table v ol output low voltage 74 0.35 0.5 v i ol = 8.0 ma v in = v il or v ih per truth table i ih input high current 20 m a v cc = max, v in = 2.7 v i ih input high current 0.1 ma v cc = max, v in = 7.0 v i il input low current 0.4 ma v cc = max, v in = 0.4 v i os short circuit current (note 1) 20 100 ma v cc = max i cc power supply current 13 ma v cc = max note 1: not more than one output should be shorted at a time, nor for more than 1 second. ac characteristics (t a = 25 c, v cc = 5.0 v) symbol parameter limits unit test conditions symbol parameter min typ max unit test conditions t plh t phl propagation delay, clock to output q 18 21 27 32 ns v cc = 5.0 v c l = 15 pf
5-560 fast and ls ttl data sn54/74ls398 ? sn54/74ls399 ac setup requirements (t a = 25 c) symbol parameter limits unit test conditions symbol parameter min typ max unit test conditions t w clock pulse width 20 ns v cc = 5.0 v t s data setup time 25 ns v cc = 5.0 v t s select setup time 45 ns v cc = 5.0 v t h hold time, any input 0 ns definitions of terms setup time(t s ) e is defined as the minimum time required for the correct logic level to be present at the logic input prior to the clock transition from low -to-high in order to be recog- nized and transferred to the outputs. hold time(t h ) e is defined as the minimum time following the clock transition from low -to-high that the logic level must be maintained at the input in order to ensure continued recognition. a negative hold t ime indicates that the correct logic level may be released prior to the clock transition from low-to-high and still be recognized. ac waveforms figure 1 figure 2 figure 3 *the shaded areas indicate when the input is permitted to change for predictable output performance.

5-561 fast and ls ttl data

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5-562 fast and ls ttl data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. at ypicalo parameters can and do vary in dif ferent applications. all operating parameters, including at ypicalso must be validated for each customer application by customer ' s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur . should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/af firmative action employer . literature distribution centers: usa: motorola literature distribution; p .o. box 20912; phoenix, arizona 85036. europe: motorola ltd.; european literature centre; 88 t anners drive, blakelands, milton keynes, mk14 5bp , england. jap an: nippon motorola ltd.; 4-32-1, nishi-gotanda, shinagawa-ku, t okyo 141, japan. asia p acific: motorola semiconductors h.k. ltd.; silicon harbour center , no. 2 dai king street, t ai po industrial estate, t ai po, n.t., hong kong. ?

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